1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to an MIS (Metal Insulator Semiconductor)-type semiconductor device in which a gate electrode made of, for example, polycrystalline silicon is formed on a silicon substrate with a gate insulating film made of amorphous aluminate, and being sandwiched between the gate electrode and the silicon substrate, and to the method for manufacturing the same.
The present application claims priority of Japanese Patent Application No. 2002-381216 filed on Dec. 27, 2002, which is hereby incorporated by reference.
2. Description of the Related Art
In recent years, to satisfy a need for scale-down and high integration of a semiconductor device, when silicon oxide (SiO2) is used as a gate insulating film, it is necessary to reduce its film thickness of, for example, an FET (Field Effect Transistor) to several nanometers or less. However, a problem arises that, if the gate insulating film is made so extremely thin, a tunnel current flowing when a gate bias is applied becomes so large, compared with a source-drain current, that it cannot be neglected. To solve this problem, a method is proposed in which, by using an insulator material having a relative dielectric constant being higher than that of silicon oxide, a gate insulating film practically and effectively made thin. For example, a method for manufacturing an FET is disclosed in, for example, Japanese Patent Application Laid-open No. 2002-314072 in which zirconium oxide having a relative dielectric constant εr being about 30 is used as a material for a gate insulating film instead of silicon oxide (see FIG. 15). The disclosed FET 101, as shown in FIG. 15, has a silicon substrate 103 on which a source-drain region 102 is formed, a gate insulating film 104 being deposited on the silicon substrate 103, and a gate electrode 105 made of polycrystalline silicon (poly-Si) formed on the gate insulating film 104. In the technology, an aluminum oxide layer 106 is deposited on the silicon substrate 103, serving as a seed layer, and a zirconium oxide layer 107 is deposited on the aluminum oxide layer 106. As shown in FIG. 15, in manufacturing the FET 101, the gate insulating film 104 as multilayer is formed on the silicon substrate 103, by depositing in sequence and stacking the aluminum oxide layer 106 and zirconium oxide layer 107 both being amorphous on the silicon substrate 103.
Also, another method for manufacturing an FET 201 is proposed, as shown in FIG. 16, in which hafnium oxide having a relative dielectric constant εr being about 20 is used as the material for the gate insulating film. The FET 201, as shown in FIG. 16, has a silicon substrate 203 on which a source-drain region 202 is formed, a gate insulating film 204 made of hafnium oxide being deposited on the silicon substrate 203, and a gate electrode 205 formed directly on the gate insulating film 204. To manufacture the FET 201, a hafnium oxide layer is deposited on the silicon substrate 203 to form the gate insulating film 204.
Here, a film thickness considering the relative dielectric constant of metal oxide is simply called an “EOT” (Equivalent Oxide Thickness). As shown by a characteristic curve “Lp” in FIG. 17, a relation between the EOT and a leakage current density obtained when a metal is used as a material for the gate electrode 205 in the FET 201 in FIG. 16 is excellent. In FIG. 17, a characteristic curve “Lq” shows a relation between the EOT and the leakage current density obtained when polycrystalline silicon is used as the material for the gate electrode 205. Also, in FIG. 17, a characteristic curve “Lr” shows a relation between the EOT and the leakage current density obtained when polycrystalline silicon is used as the material for the gate electrode 205 and the gate insulating film 204 is made up of only aluminum oxide and a characteristic curve “Ls” shows a relation between the EOT and the leakage current density obtained when polycrystalline silicon is used as the material for the gate electrode 205 and the gate insulating film 204 is made up of only silicon oxide.
Moreover, when metals as described above are used as the materials for the gate electrode 205, though an experiment on only such the characteristic as the relation between the EOT and leakage current density shows good results, the metals cannot be practically employed due to following reasons. That is, in an LSI (Large Scale Integrated Circuit), two kinds of FETs (Field Effect Transistors), one being an nMOSFET (n-type Metal Oxide Semiconductor FET) and another being a pMOSFET (p-type MOSFET). Therefore, it is necessary to form gate electrodes each having a different work function on a same wafer at the same time. When polycrystalline silicon or germanium polycrystalline silicon is used as a material for the gate electrode, by performing a doping process, the work function of the gate electrode can be changed. However, if metals are used as the material for the gate electrode, since a work function cannot be changed, there is a difficulty in manufacturing a CMOS (Complementary MOS). Also, generally, if metals are used as a material for the gate electrode, the gate insulating film is easily short-circuited due to a reaction between the gate electrode and gate insulating film caused by heat treatment for source/drain activation. To solve this problem, by using polycrystalline silicon or a like as the material for the gate electrode and, at the same time, by using a material having a high relative dielectric constant as the material for the gate insulating film, an effort to obtain the excellent characteristic (the relation between the EOT and leakage current density) is made.
However, this method has also a problem in that, if zirconium oxide is used as the material for the gate insulating film, crystallization of amorphous zirconium oxide occurs due to heat treatment in a process of forming the gate electrode 105 or of forming the source/drain region 102, or if polycrystalline silicon is used as the material for the gate electrode 105, a short-circuit is made due to incompatibility with zirconium oxide. Moreover, an another problem arises that, if hafnium oxide is used as the material for the gate insulating film, crystallization of the hafnium oxide easily occurs due to heat treatment which causes occurrence of a grain boundary passing through higher and lower electrodes. These problems cause an increase in a leakage current leading to easy occurrence of dielectric breakdown and to reduction in reliability of semiconductor devices. Furthermore, if polycrystalline silicon is used as a material for the gate electrode, an electrostatic capacity becomes lower compared with the case where metals are used as the material for the gate electrode and, as shown by the characteristic curve “Lq” in FIG. 17, the EOT is greatly degraded compared with the case shown by the characteristic curve “Lp”.